[IEEE Journal of Solid-State Circuits (JSSC), 2024] Junsoo Kim’s paper on EPU: An Energy-Efficient Explainable AI Accelerator with Sparsity-free Computation and Heat Map Compression/Pruning is accepted

Congratulations! We have a paper accepted to Journal of Solid-State Circuits (JSSC), 2024 “EPU: An Energy-Efficient Explainable AI Accelerator with Sparsity-free Computation and Heat Map Compression/Pruning” Junsoo Kim, Seunghee Han, Geonwoo Ko, Ji-Hoon Kim, Changha Lee, Taewoo Kim, Chan-Hyun Youn, and Joo-Young Kim

[ESSCIRC 2023] Je Yang’s paper on Joint-DNN Training Processor is accepted

Congratulations! We have a paper accepted to IEEE European Solid-State Circuits Conference (ESSCIRC), 2023 ” JNPU: A 1.04TFLOPS Joint-DNN Training Processor with Speculative Cyclic Quantization and Triple Heterogeneity on Microarchitecture / Precision / Dataflow ” Je Yang, Sukbin Lim, Sukjin Lee, Jae-Young Kim and Joo-Young Kim