[CICC 2022] Jaehoon Heo’s paper on T-PIM is accepted

Congratulations! We have a paper accepted to IEEE Custom Integrated Circuits Conference (CICC), 2022. “T-PIM: A 2.21-to-161.08TOPS/W Processing-In-Memory Accelerator for End-to-End On-Device Training” Jaehoon Heo, Junsoo Kim, Wontak Han, Sukbin Lim, Joo-Young Kim

[Fall 2021] Announcing 2021 Kwon Young-Se Scholarship Award Winners

Congratulations to our outstanding students Jaeuk Kim and Seungjae Moon, who were selected through a competitive process. In recognition of their academic achievement for the past years, they win 2021 Kwon Young-Se scholarship, awarded by KAIST department of electrical engineering.

[ACSMD Workshop 2021] Sungyeob Yoo and Junghoon Kim’s paper on A Heterogeneous Vector-Array Architecture is accepted

Congratulations! We have a paper accepted to Architecture, Compiler, and System Support for Multi-model DNN Workloads (ACSMD) Workshop (MICRO Workshop), 2021. “A Heterogeneous Vector-Array Architecture with Resource Scheduling for Multi-User/Multi-DNN Workloads” Sungyeob Yoo, Jung-Hoon Kim, Joo-Young Kim https://research.facebook.com/arch-comp-sys-support-for-multi-model-dnn-workshop/

[Fall 2021] Welcome New Faces!

Hi Castlab. Three new master’s students(Sukbin, Seungjae, and Jaeuk) have joined Castlab since this 2021 fall semester. Sukbin, Seungjae, and Jaeuk are interested in Processing-in Memory (PIM) and AI chip design. [Sukbin] “HI, I’m a new M.S. student. As an undergraduate, I started having an interest in digital circuits and made a decision to enter […]

[Spring 2021] Welcome New Faces!

Hi Castlab. Two new masters students(Wontak on left, Junsoo on right) have joined Castlab since this 2021 spring semester. Wontak and Junsoo both are interested in AI chip design. [Junsoo] “Hello, I’m Junsoo Kim, a freshman in the CastLab master’s degree. I joined CastLab because I liked studying in computers and program coding, and wanted […]

[JSSC 2021] Ji-Hoon Kim’s paper on Z-PIM is accepted

Congratulations! We have a paper accepted to IEEE Journal of Solid-State Circuits(JSSC), 2021. “Z-PIM: A Sparsity-Aware Processing-In-Memory Architecture with Fully-Variable Weight Bit-Precision for Energy-Efficient Deep Neural Networks” Ji-Hoon Kim, Juhyoung Lee, Jinsu Lee, Jaehoon Heo, Joo-Young Kim https://ieeexplore.ieee.org/document/9337169

[VLSI 2020] Ji-Hoon Kim’s paper on Z-PIM is accepted

Congratulations! We have a paper accepted to IEEE Symposium on VLSI Circuits, 2020. “Z-PIM: An Energy-Efficient Sparsity-Aware Processing-In-Memory Architecture with Fully-Variable Weight Precision” Ji-Hoon Kim, Juhyoung Lee, Jinsu Lee, Hoi-jun Yoo, Joo-Young Kim https://ieeexplore.ieee.org/document/9163015