Joo-Young Kim received the B.S., M.S., and Ph. D degree in Electrical Engineering from Korea Advanced Institute of Science and Technology (KAIST), in 2005, 2007, and 2010, respectively. He is currently an Assistant Professor in the School of Electrical Engineering at KAIST. He is also the Director of AI Semiconductor Systems (AISS) research center. His research interests span various aspects of hardware design including VLSI design, computer architecture, FPGA, domain specific accelerators, hardware/software co-design, and agile hardware development. Before joining KAIST, Joo-Young was a Senior Hardware Engineering Lead at Microsoft Azure working on hardware acceleration for its hyper-scale big data analytics platform named Azure Data Lake. Before that, he was one of the initial members of Catapult project at Microsoft Research, where he deployed a fabric of FPGAs in datacenters to accelerate critical cloud services such as machine learning, data storage, and networking.
Joo-Young is a recipient of the 2016 IEEE Micro Top Picks Award, the 2014 IEEE Micro Top Picks Award, the 2010 DAC/ISSCC Student Design Contest Award, the 2008 DAC/ISSCC Student Design Contest Award, and the 2006 A-SSCC Student Design Contest Award. He serves as Associate Editor for the IEEE Transactions on Circuits and Systems I: Regular Papers (2020-2021).
- Ph.D. in Electrical Engineering, KAIST, February 2010 (Advisor: Professor Hoi-Jun Yoo)
- Dissertation: “High Performance Low Power Real-Time Multi-Object Recognition Processor with Visual Perception Engine”
- M.S. in Electrical Engineering and Computer Science, KAIST, February 2007.
- B.S. in Electrical Engineering, Magna cum Laude, KAIST, February 2005.
- Senior Hardware Engineering Lead, Microsoft Azure (11/2017 – 8/2019)
- Senior Research Hardware Design Engineer, Microsoft Research (2/2014 – 10/2017)
- Research Hardware Design Engineer II, Microsoft Research (2/2012 – 1/2014)
- Visiting Researcher, Microsoft Research (9/2010 – 8/2011)
- Post-doctoral Researcher, KAIST (2/2010 – 1/2012)
- Research Intern, SoC Solutions (1/2006 – 3/2006)
- Project Catapult won Geekwire’s Innovation of the Year Award (2017)
- “A Cloud-Scale Acceleration Architecture” selected for IEEE Micro Top Picks in Computer Architecture (2016)
- “A Reconfigurable Fabric for Accelerating Large-Scale Datacenter Services” selected for IEEE Micro Top Picks in Computer Architecture (2014)
- “A Real-time Embedded Vision System with 201.4GOPS 496mW Object Recognition Processor” won Design Contest Award at 47th Design Automation Conference (2010)
- “Vision Platform for Mobile Intelligent Robot based on 81.6GOPS Object Recognition Processor” won Design Contest Award at 45th Design Automation Conference (2008)
- “A TCAM based Periodic Event Generator for Multi-Node Management in Body Sensor Network” won Design Contest Award at 2nd Asian Solid-State Circuits Conference (2006)