Journal Papers

2024
31
JSSC
SCI Q1
SP-PIM: A Super-Pipelined Processing-In-Memory Accelerator with Local Error Prediction for Area/Energy-Efficient On-Device Learning Circuit
IEEE Journal of Solid-State Circuits (JSSC), 2024
*Jaehoon Heo, *Jung-Hoon Kim, Wontak Han, Jaeuk Kim and Joo-Young Kim (*equal contribution)
30
JSSC
SCI Q1
EPU: An Energy-Efficient Explainable AI Accelerator with Sparsity-free Computation and Heat Map Compression/Pruning Circuit
IEEE Journal of Solid-State Circuits (JSSC), 2024
Junsoo Kim, Seunghee Han, Geonwoo Ko, Ji-Hoon Kim, Changha Lee, Taewoo Kim, Chan-Hyun Youn, and Joo-Young Kim
29
IEEE Access
Trinity: In-Database Near-Data Machine Learning Acceleration Platform for Advanced Data Analytics FPGA
IEEE Access, 2024
Ji-Hoon Kim, Seunghee Han, Kwanghyun Park, Soo-Young Ji, Joo-Young Kim
2023
28
Communications
of the ACM
SCI Q1
South Korea's Nationwide Effort for AI Semiconductor Industry Circuit
Communications of the ACM, Vol. 66, No. 7, 2023
Ji-Hoon Kim, Sungyeob Yoo , and Joo-Young Kim
27
TCAS-I
SCI Q2
Agamotto: A Performance Optimization Framework for CNN Accelerator with Row Stationary Dataflow FPGA
IEEE Transactions on Circuits and Systems I (TCAS-I), 2023
Donghyuk Kim, Sanghyun Jeong, and Joo-Young Kim
2022
26
JSSC
SCI Q1
T-PIM: An Energy-Efficient Processing-In-Memory Accelerator for End-to-End On-Device Training Circuit
IEEE Journal of Solid-State Circuits (JSSC), 2022
Jaehoon Heo, Junsoo Kim, Sukbin Lim, Wontak Han, and Joo-Young Kim
25
TCAS-I
SCI Q2
Accelerating Deep Convolutional Neural Networks Using Number Theoretic Transform FPGA
IEEE Transactions on Circuits and Systems I (TCAS-I), 2022
Prasetiyo, Seongmin Hong, Yashael Faith Arthanto, and Joo-Yong Kim
24
CAL
SCIE
OpenMDS: An Open-Source Shell Generation Framework for High-Performance Design on Xilinx Multi-Die FPGAs Architecture Automation Github
IEEE Computer Architecture Letters (CAL), 2022
Gyeongcheol Shin, Junsoo Kim, and Joo-Young Kim
23
JETCAS
SCI Q1
Design of Processing-in-Memory with Triple Computational Path and Sparsity Handling for Energy-Efficient DNN Training Circuit
IEEE Journal on Emerging and Selected Topics in Circuits and Systems (JETCAS), 2022
Wontak Han, Jaehoon Heo, Junsoo Kim, Sukbin Lim, and Joo-Young Kim
22
JETCAS
SCI Q1
An Overview of Processing-in-Memory Circuits for Artificial Intelligence and Machine Learning Circuit
IEEE Journal on Emerging and Selected Topics in Circuits and Systems (JETCAS), 2022
Donghyuk Kim, Chengshuo Yu, Shanshan Xie, Yuzong Chen, Joo-Young Kim, Bongjin Kim, Jaydeep Kulkarni, and Tony Tae-Hyoung Kim
21
TC
SCI Q2
Accelerating Large-Scale Graph-based Nearest Neighbor Search on a Computational Storage Platform Architecture Amazon Samsung
IEEE Transactions on Computers (TC), 2022
Ji-Hoon Kim, Yeo-Reum Park, Jaeyoung Do, Soo-Young Ji, and Joo-Young Kim
2021
20
JSSC
SCI Q1
Z-PIM: A Sparsity-Aware Processing-In-Memory Architecture with Fully-Variable Weight Bit-Precision for Energy-Efficient Deep Neural Networks Circuit
IEEE Journal of Solid-State Circuits (JSSC), Vol. 56, No. 4, Apr. 2021
Ji-Hoon Kim, Juhyoung Lee, Jinsu Lee, Jaehoon Heo, and Joo-Young Kim
2020
19
JSTS
SCIE
An Ultra-low-power Mixed-mode Face Recognition Processor for Always-on User Authentication in Mobile Device Circuit
Journal of Semiconductor Technology and Science (JSTS), Vol. 20, No. 6, Dec. 2020
Ji-Hoon Kim, Changhyeon Kim, Kwantae Kim, Juhyung Lee, Hoi-Jun Yoo, and Joo-Young Kim
Before 2020
18
IEEE Micro
SCI Q2
Configurable Clouds Architecture
IEEE Micro, Vol. 37, No. 3, 2017
Adrian Caulfield, Eric Chung, Andrew Putnam, Hari Angepat, Daniel Firestone, Jeremy Fowers, Michael Haselman, Stephen Heil, Matt Humphrey, Puneet Kaur, Joo-Young Kim, Daniel Lo, Todd Massengill, Kalin Ovtcharov, Michael Papamichael, Lisa Woods, Sitaram Lanka, Derek Chiou, and Doug Burger
17
Communications
of the ACM
SCI Q1
A Reconfigurable Fabric For Accelerating Large-Scale Datacenter Services Architecture
Communications of the ACM, Vol. 59, No. 11, 2016
Andrew Putnam, Adrian Caulfield, Eric Chung, Derek Chiou, Kypros Constantinides, John Demme, Hadi Esmaeilzadeh, Jeremy Fowers, Gopi Prashanth Gopal, Jan Gray, Michael Haselman, Scott Hauck, Stephen Heil, Amir Hormati, Joo-Young Kim, Sitaram Lanka, James Larus, Eric Peterson, Simon Pope, Aaron Smith, Jason Thong, Phillip Yi Xiao, and Doug Burger
16
IEEE Micro
SCI Q2
A Reconfigurable Fabric for Accelerating Large-Scale Datacenter Services Architecture
IEEE Micro, Vol.35, No. 3, 2015
Andrew Putnam, Adrian M. Caulfield, Eric S. Chung, Derek Chiou, Kypros Constantinides, John Demme, Hadi Esmaeilzadeh, Jeremy Fowers, Jan Gray, Michael Haselman, Scott Hauck, Stephen Heil, Amir Hormati, Joo-Young Kim, Sitaram Lanka, James R. Larus, Eric Peterson, Gopi Prashanth, Aaron Smith, Jason Thong, Phillip Yi Xiao, and Doug Burger
15
Microsoft
White paper
Accelerating Deep Convolutional Neural Networks Using Specialized Hardware Architecture
Microsoft White paper, 2015
Kalin Ovtcharov, Olatunji Ruwase, Joo-Young Kim, Jeremy Fowers, Karin Strauss, and Eric S. Chung
14
JSSC
SCI Q1
A 320mW 342GOPS Real-Time Dynamic Object Recognition Processor for HD 720p Video Streams Circuit
IEEE Journal of Solid-State Circuits (JSSC), Vol. 48, No. 1, 2013
Jinwook Oh, Gyeonghoon Kim, Junyoung Park, Injoon Hong, Seungjin Lee, Joo-Young Kim, Jeong-Ho Woo, and Hoi-Jun Yoo
13
IEEE Micro
SCI Q2
Low-Power, Real-Time Object Recognition Processor for Mobile Vision Systems Architecture
IEEE Micro, Vol. 32, No. 6, 2012
Jinwook Oh, Gyeonghoon Kim, Junyoung Park, Injoon Hong, Seungjin Lee, Joo-Young Kim, Jeong-Ho Woo, and Hoi-Jun Yoo
12
JSSC
SCI Q1
A 92mW Real-Time Traffic Sign Recognition System with Robust Illumination Adaptation and Support Vector Machine Circuit
IEEE Journal of Solid-State Circuits (JSSC), Vol. 47, No. 11, 2012
Junyoung Park, Joonsoo Kwon, Jinwook Oh, Seungjin Lee, Joo-Young Kim, and Hoi-Jun Yoo
11
IEEE Transactions
on Neural Networks
SCI Q1
24-GOPS 4.5-mm2 Digital Cellular Neural Network for Rapid Visual Attention in an Object-Recognition SoC Architecture
IEEE Transactions on Neural Networks, Vol. 22, No. 1, 2011
Seungjin Lee, Minsu Kim, Kwanho Kim, Joo-Young Kim, and Hoi-Jun Yoo
10
JSSC
SCI Q1
A 118.4GB/s Multi-Casting Network-on-Chip with Hierarchical Star-Ring Combined Topology for Real-Time Object Recognition Circuit
IEEE Journal of Solid-State Circuits (JSSC), Vol. 45, No. 7, 2010
Joo-Young Kim, Junyoung Park, Seungjin Lee, Minsu Kim, Jinwook Oh, and Hoi-Jun Yoo
9
Elsevier Signal
Processing:Image
Communication
An Attention Controlled Multi-Core Architecture for Energy Efficient Object Recognition Architecture
Elsevier Signal Processing: Image Communication, Vol. 25, No. 5, 2010
Joo-Young Kim, Sejong Oh, Seungjin Lee, Minsu Kim, Jinwook Oh, and Hoi-Jun Yoo
8
TCSVT
SCI Q1
Visual Image Processing RAM: Memory Architecture with 2-D Data Location Search and Data Consistency Management for a Multi-Core Object Recognition Processor Circuit
IEEE Transactions on Circuits and Systems for Video Technology (TCSVT), Vol. 20, No. 4, 2010
Joo-Young Kim, Donghyun Kim, Kwanho Kim, Seungjin Lee, and Hoi-Jun Yoo
7
Elsevier Pattern
Recognition
Familiarity Based Unified Visual Attention Model for Fast and Robust Object Recognition Architecture
Elsevier Pattern Recognition, Vol. 43, No. 3, 2010
Seungjin Lee, Kwanho Kim, Joo-Young Kim, Minsu Kim, and Hoi-Jun Yoo
6
JSSC
SCI Q1
A 201.4GOPS 496mW Real-Time Multi-Object Recognition Processor with Bio-Inspired Neural Perception Engine Circuit
IEEE Journal of Solid-State Circuits (JSSC), Vol. 45, No. 1, 2010
Joo-Young Kim, Minsu Kim, Seungjin Lee, Jinwook Oh, Kwanho Kim, and Hoi-Jun Yoo
Before 2010
5
IEEE Micro
SCI Q2
Real-Time Object Recognition with Neuro-Fuzzy Controlled Workload-aware Task Pipelining Architecture
IEEE Micro, Vol. 29, No. 6, 2009
Joo-Young Kim, Minsu Kim, Seungjin Lee, Jinwook Oh, Sejong Oh, and Hoi-Jun Yoo
4
TCSVT
SCI Q1
A Configurable Heterogeneous Multicore Architecture with Cellular Neural Network for Real-Time Object Recognition Circuit
IEEE Transactions on Circuits and Systems for Video Technology (TCSVT), Vol. 19, No. 11, 2009
Kwanho Kim, Seungjin Lee, Joo-Young Kim, Minsu Kim, and Hoi-Jun Yoo
3
IET Computers &
Digital Techniques
SCIE
Memory-Centric Network-on-Chip for Power Efficient Execution of Task-Level Pipeline on a Multi-Core Processor Circuit
IET Computers & Digital Techniques, Vol. 3, No. 5, 2009
Donghyun Kim, Kwanho Kim, Seungjin Lee, Joo-Young Kim, Minsu Kim, and Hoi-Jun Yoo
2
TVLSI
SCIE
81.6 GOPS Object Recognition Processor Based on a Memory-Centric NoC Circuit
IEEE Transactions on Very Large Scale Integration (TVLSI), Vol. 17, No. 3, 2009
Donghyun Kim, Kwanho Kim, Joo-Young Kim, Seungjin Lee, Se-Joong Lee, and Hoi-Jun Yoo
1
JSSC
SCI Q1
A 125 GOPS 583 mW Network-on-Chip Based Parallel Processor with Bio-Inspired Visual Attention Engine Circuit
IEEE Journal of Solid-State Circuits (JSSC), Vol. 44, No. 1, 2009
Kwanho Kim, Seungjin Lee, Joo-Young Kim, Minsu Kim, and Hoi-Jun Yoo