News

[ESSERC 2024] Sungyeob Yoo’s paper on A 28nm 4.96 TOPS/W End-to-End Diffusion Accelerator with Reconfigurable Hyper-Precision and Unified Non-Matrix Processing Engine is accepted

Congratulations! We have a paper accepted to Symposium on European Solid-State Electronics Research Conference(ESSERC), 2024 “A 28nm 4.96 TOPS/W End-to-End Diffusion Accelerator with Reconfigurable Hyper-Precision and Unified Non-Matrix Processing Engine” Sungyeob Yoo, Geonwoo Ko, Seri Ham, Seeyeon Kim, Yi Chen, and Joo-Young Kim

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[ESSERC 2024] Donghyuk Kim’s paper on DPIM: A 19.36TOPS/W 2T1C eDRAM Transformer-in-Memory Chip with Sparsity-Aware Quantization and Heterogeneous Dense-Sparse Core is accepted

Congratulations! We have a paper accepted to Symposium on European Solid-State Electronics Research Conference(ESSERC), 2024 “A 19.36TOPS/W 2T1C eDRAM Transformer-in-Memory Chip with Sparsity-Aware Quantization and Heterogeneous Dense-Sparse Core” Donghyuk Kim, Jae-Young Kim, Hyunjun Cho, Seungjae Yoo, Sukjin Lee, Sungwoong Yune, Hoichang Jeong, Keonhee Park, Ki-soo Lee, Jongchan Lee, Chanheum Han, Gunmo Koo, Yuli Han, Jaejin […]

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[JSSC 2024] Jaehoon Heo and Junghoon Kim’s paper on SP-PIM: A Super-Pipelined Processing-In-Memory Accelerator with Local Error Prediction for Area/Energy-Efficient On-Device Learning is accepted

Congratulations! We have a paper accepted to IEEE Journal of Solid-State Circuits (JSSC), 2024 “SP-PIM: A Super-Pipelined Processing-In-Memory Accelerator with Local Error Prediction for Area/Energy-Efficient On-Device Learning” *Jaehoon Heo, *Jung-Hoon Kim, Wontak Han, Jaeuk Kim and Joo-Young Kim (*equal contribution)

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[IEEE Custom Integrated Circuits Conference (CICC), 2024] Sukbin Lim’s paper on A 38.5TOPS/W Point Cloud Neural Network Processor with Virtual Pillar and Quadtree-based Workload Management for Real-Time Outdoor BEV Detection is accepted

Congratulations! We have a paper accepted to IEEE Custom Integrated Circuits Conference (CICC), 2024 “A 38.5TOPS/W Point Cloud Neural Network Processor with Virtual Pillar and Quadtree-based Workload Management for Real-Time Outdoor BEV Detection” Sukbin Lim, Jaehoon Heo, Jinho Yang, Joo-Young Kim

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[IEEE Journal of Solid-State Circuits (JSSC), 2024] Junsoo Kim’s paper on EPU: An Energy-Efficient Explainable AI Accelerator with Sparsity-free Computation and Heat Map Compression/Pruning is accepted

Congratulations! We have a paper accepted to Journal of Solid-State Circuits (JSSC), 2024 “EPU: An Energy-Efficient Explainable AI Accelerator with Sparsity-free Computation and Heat Map Compression/Pruning” Junsoo Kim, Seunghee Han, Geonwoo Ko, Ji-Hoon Kim, Changha Lee, Taewoo Kim, Chan-Hyun Youn, and Joo-Young Kim

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