Congratulations!
We have a paper accepted to the International Conference on Symposium on VLSI Technology and Circuits (VLSI), 2023.
“SP-PIM: A 22.41TFLOPS/W, 8.81Epochs/Sec Super-Pipelined Processing-In-Memory Accelerator with Local Error Prediction for On-Device Learning”
- *Jung-Hoon Kim, *Jaehoon Heo, Wontak Han, Jaeuk Kim and Joo-Young Kim (*equal contribution)