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HotChips
DFX: A Low-latency Multi-FPGA Appliance for Accelerating Transformer-based Text Generation
Hot Chips: A Symposium on High Performance Chips (HOTCHIPS), 2022
Seongmin Hong, Seungjae Moon, Junsoo Kim, Sungjae Lee, Minsub Kim, Dongsoo Lee, Joo-Young Kim
Architecture
FPGA
Naver
2022
CICC
MAJOR
A Multi-Nodes Human Body Communication Sensor Network Control Processor
IEEE Custom Circuits Conference (CICC), 2006
Sungdae Choi, Seong-Jun Song, Kyomin Sohn, Hyejung Kim, Jooyoung Kim, Namjun Cho, Jeong-Ho Woo, Jerald Yoo, Hoi-Jun Yoo
Circuit
2006
ESSCIRC
MAJOR
JNPU: A 1.04TFLOPS Joint-DNN Training Processor with Speculative Cyclic Quantization and Triple Heterogeneity on Microarchitecture / Precision / Dataflow
IEEE European Solid-State Circuits Conference (ESSCIRC), 2023
Je Yang, Sukbin Lim, Sukjin Lee, Jae-Young Kim, Joo-Young Kim
Circuit
2023
ESSERC
MAJOR
D3TA: 38.9TOPS/W Transformer Accelerator with Dual-Port 3T-eDRAM Digital Compute-In-Memory Using HyperAttention and Triple-Sparsity-Handling
European Solid-State Electronics Research Conference(ESSERC), 2025
Donghyuk Kim*, In-Jun Jung*, Geonwoo Ko, Seri Ham, Cuong Duong Manh, Gyeongrok Yang, Joo-Young Kim (*equal contribution)
Circuit
2025
ISCA
TOP-TIER
LightNobel: Improving Sequence Length Limitation in Protein Structure Prediction Model via Adaptive Activation Quantization
ACM/IEEE International Symposium on Computer Architecture (ISCA), 2025
*Seunghee Han, *Soongyu Choi, Joo-Young Kim (*equal contribution)
Architecture
2025
