Junghoon Kim
Ph.D. Student
Research Interest
- Ai chip design
Publication
Conference Paper
SP-PIM: A 22.41TFLOPS/W, 8.81Epochs/Sec Super-Pipelined Processing-In-Memory Accelerator with Local Error Prediction for On-Device Learning
*Jung-Hoon Kim, *Jaehoon Heo, Wontak Han, Jaeuk Kim and Joo-Young Kim (*equal contribution)
IEEE Symposium on VLSI Circuits (VLSI), 2023
A 409.6 GOPS and 204.8 GFLOPS Mixed-Precision Vector Processor System for General-Purpose Machine Learning Acceleration
Jung-Hoon Kim, Sukjin Lee, Joo-Young Kim
IEEE Asian Solid-State Circuits Conference (A-SSCC) 2022
A Heterogeneous Vector-Array Architecture with Resource Scheduling for Multi-User/Multi-DNN Workloads
Sungyeob Yoo, Jung-Hoon Kim, Joo-Young Kim
Architecture, Compiler, and System Support for Multi-model DNN Workloads (ACSMD) Workshop 2021 (MICRO Workshop)
Journal Paper
SP-PIM: A Super-Pipelined Processing-In-Memory Accelerator with Local Error Prediction for Area/Energy-Efficient On-Device Learning
*Jaehoon Heo, *Jung-Hoon Kim, Wontak Han, Jaeuk Kim and Joo-Young Kim (*equal contribution)
IEEE Journal of Solid-State Circuits (JSSC), 2024