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  • March 24, 2025
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“ADOR: A Design Exploration Framework for LLM Serving with Enhanced Latency and Throughput” IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS), 2025

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June 04, 2025

[ESSERC 2025] Donghyuk Kim and In-Jun Jung’s paper on D3TA: 38.9TOPS/W Transformer Accelerator with Dual-Port 3T-eDRAM Digital Compute-In-Memory Using HyperAttention and Triple-Sparsity-Handling is accepted

June 04, 2025

[TC 2025] Wontak Han’s paper on SAL-PIM: A Subarray-level Processing-in-Memory Architecture with LUT-based Linear Interpolation for Transformer-based Text Generation is accepted

April 02, 2025

[VLSI 2025] Jung-Hoon Kim’s paper on Adelia: A 4nm LLM Accelerator with Streamlined Dataflow and Dual-Mode Parallelization for Efficient Generative AI Inference is accepted

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