Congratulations! We have a paper accepted to IEEE International Symposium on High-Performance Computer Architecture (HPCA) 2025 “EXION: Exploiting Inter- and Intra-Iteration Output Sparsity for Diffusion Models”
Read MoreCongratulations! We have a paper accepted to Symposium on European Solid-State Electronics Research Conference(ESSERC), 2024 “A 28nm 4.96 TOPS/W End-to-End Diffusion Accelerator with Reconfigurable Hyper-Precision and Unified Non-Matrix Processing Engine” Sungyeob Yoo, Geonwoo Ko, Seri Ham, Seeyeon Kim, Yi Chen, and Joo-Young Kim
Read MoreCongratulations! We have a paper accepted to Symposium on European Solid-State Electronics Research Conference(ESSERC), 2024 “A 19.36TOPS/W 2T1C eDRAM Transformer-in-Memory Chip with Sparsity-Aware Quantization and Heterogeneous Dense-Sparse Core” Donghyuk Kim, Jae-Young Kim, Hyunjun Cho, Seungjae Yoo, Sukjin Lee, Sungwoong Yune, Hoichang Jeong, Keonhee Park, Ki-soo Lee, Jongchan Lee, Chanheum Han, Gunmo Koo, Yuli Han, Jaejin […]
Read MoreCongratulations! We have a paper accepted to ACM/IEEE International Symposium on Computer Architecture (ISCA), 2024 “BLESS: Bandwidth and Locality Enhanced SMEM Seeding Acceleration for DNA Sequencing” *Seunghee Han, *Seungjae Moon, Teokkyu Suh, Jaehoon Heo and Joo-Young Kim (*equal contribution)
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