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Congratulations! We have a paper accepted to Symposium on European Solid-State Electronics Research Conference(ESSERC), 2024 “A 19.36TOPS/W 2T1C eDRAM Transformer-in-Memory Chip with Sparsity-Aware Quantization and Heterogeneous Dense-Sparse Core” Donghyuk Kim, Jae-Young Kim, Hyunjun Cho, Seungjae Yoo, Sukjin Lee, Sungwoong Yune, Hoichang Jeong, Keonhee Park, Ki-soo Lee, Jongchan Lee, Chanheum Han, Gunmo Koo, Yuli Han, Jaejin […]

Congratulations! We have a paper accepted to Symposium on High Performance Chips (HotChips), 2024 “ Picasso: An Area/Energy-Efficient End-to-End Diffusion Accelerator with Hyper-Precision Data Type” Sungyeob Yoo, Geonwoo Ko, Seri Ham, Seeyeon Kim, Yi Chen, and Joo-Young Kim

Congratulations! We have a paper accepted to ACM/IEEE International Symposium on Computer Architecture (ISCA), 2024 “BLESS: Bandwidth and Locality Enhanced SMEM Seeding Acceleration for DNA Sequencing” *Seunghee Han, *Seungjae Moon, Teokkyu Suh, Jaehoon Heo and Joo-Young Kim (*equal contribution)

Congratulations! We have a paper accepted to IEEE Journal of Solid-State Circuits (JSSC), 2024 “SP-PIM: A Super-Pipelined Processing-In-Memory Accelerator with Local Error Prediction for Area/Energy-Efficient On-Device Learning” *Jaehoon Heo, *Jung-Hoon Kim, Wontak Han, Jaeuk Kim and Joo-Young Kim (*equal contribution)

Congratulations! We have a paper accepted to IEEE Custom Integrated Circuits Conference (CICC), 2024 “A 38.5TOPS/W Point Cloud Neural Network Processor with Virtual Pillar and Quadtree-based Workload Management for Real-Time Outdoor BEV Detection” Sukbin Lim, Jaehoon Heo, Jinho Yang, Joo-Young Kim

Congratulations! We have a paper accepted to Journal of Solid-State Circuits (JSSC), 2024 “EPU: An Energy-Efficient Explainable AI Accelerator with Sparsity-free Computation and Heat Map Compression/Pruning” Junsoo Kim, Seunghee Han, Geonwoo Ko, Ji-Hoon Kim, Changha Lee, Taewoo Kim, Chan-Hyun Youn, and Joo-Young Kim

Congratulations! We have a paper accepted to IEEE Access, 2024. “Trinity: In-Database Near-data Machine Learning Acceleration Platform for Advanced Data Analytics is accepted” Ji-Hoon Kim, Seunghee Han, Kwanghyun Park, Soo-Young Ji, Joo-Young Kim

Congratulations! We have a paper accepted to IEEE International Symposium on High-Performance Computer Architecture, 2024 “Morphling: A Throughput-Maximized TFHE-based Accelerator using Transform-domain Reuse ” Prasetiyo, Adiwena Putra, and Joo-young Kim

Congratulations! We have a paper accepted to Asia and South Pacific Design Automation Conference , 2024 “ACane: An Efficient FPGA-based Embedded Vision Platform with Accumulation-as-Convolution Packing for Autonomous Mobile Robots ” Jinho Yang, Sungwoong Yune, Sukbin Lim, Donghyuk Kim, and Joo-Young Kim

Congratulations! We have a paper accepted to IEEE/ACM International Symposium on Microarchitecture, 2023 “Strix: An End-to-End Streaming Architecture with Two-Level Ciphertext Batching for Fully Homomorphic Encryption with Programmable Bootstrapping” Adiwena Putra, Prasetiyo, Yi Chen, John Kim, and Joo-Young Kim